There is a growing interest to increase the channel count on parallel transmit systems. With system cost always a major consideration, substantial savings may be possible as the channel count becomes high (ie. ≥32). Typically, radiofrequency power amplifier (RFPA) designs involve multiple amplification stages to achieve a target output power. Three stages are identified in the design approach of the present work: (1) a low noise pre-amplifier; (2) a driver amplifier; and (3) a power gain amplifier. The present goal is introduce and characterize system architecture for a prototype “pre-gate” amplifier (stage 1 and 2) to explore power amplification technology for stage 3 of the RFPA.